AS 396507<p>Our lead relay engineer <span class="h-card" translate="no"><a href="https://infosec.exchange/@alexhaydock" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>alexhaydock</span></a></span> has increased our stateless <a href="https://disobey.net/tags/Tor" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Tor</span></a> exit relay deployment to 96! (+1 because of the new <a href="https://disobey.net/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> bare-metal node, +1 other we redeployed due to a silly spelling error). We're stress testing our three AMD Epyc 7402P servers that use <a href="https://disobey.net/tags/Proxmox" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Proxmox</span></a>.</p><p>Each one of the 96 Tor exit nodes are diskless Unified Kernel Images, 56MB in total size, using <span class="h-card" translate="no"><a href="https://fosstodon.org/@alpinelinux" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>alpinelinux</span></a></span>'s alpine-make-rootfs with an absolutely bare minimum number of packages. We'll be publishing more about our new architecture and configuration soon.</p><p><a href="https://disobey.net/tags/AlpineLinux" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AlpineLinux</span></a> <a href="https://disobey.net/tags/privacy" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>privacy</span></a> <a href="https://disobey.net/tags/anonymity" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>anonymity</span></a> <a href="https://disobey.net/tags/AntiCensorship" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AntiCensorship</span></a> <a href="https://disobey.net/tags/AccessToInformation" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AccessToInformation</span></a> <a href="https://disobey.net/tags/TorOps" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>TorOps</span></a> <a href="https://disobey.net/tags/TorOperators" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>TorOperators</span></a></p>
eupolicy.social is one of the many independent Mastodon servers you can use to participate in the fediverse.
This Mastodon server is a friendly and respectful discussion space for people working in areas related to EU policy. When you request to create an account, please tell us something about you.
Administered by:
Server stats:
199active users
eupolicy.social: About · Profiles directory · Privacy policy
Mastodon: About · Get the app · Keyboard shortcuts · View source code · v4.4.1
#riscv
5 posts · 5 participants · 0 posts today
Andy Newton<span class="h-card"><a class="u-url mention" href="https://clttr.it/@rwa" rel="nofollow noopener" target="_blank">@<span>rwa</span></a></span> <span class="h-card"><a class="u-url mention" href="https://pleroma.pch.net/users/woody" rel="nofollow noopener" target="_blank">@<span>woody</span></a></span> Now you have my curiosity up. What are the requirements that require you to target <a class="hashtag" href="https://akk.novalug.org/tag/riscv" rel="nofollow noopener" target="_blank">#riscv</a> if you don’t mind me asking? And how usable is the DC board for the Framework? From what I can tell, there are still no desktop-class processors on the market, though things are close.
🇺🇦 haxadecimal<p>My friend <span class="h-card" translate="no"><a href="https://mastodon.social/@Needlesscomplexity" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>Needlesscomplexity</span></a></span> has posted two articles about RISC-V assembly language techniques to his substack:<br><a href="https://needlesscomplexity.substack.com/p/efficient-risc-v-range-checking" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">needlesscomplexity.substack.co</span><span class="invisible">m/p/efficient-risc-v-range-checking</span></a><br><a href="https://needlesscomplexity.substack.com/p/efficient-sign-extension-on-risc" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">needlesscomplexity.substack.co</span><span class="invisible">m/p/efficient-sign-extension-on-risc</span></a><br>And a library of useful integer operations:<br><a href="https://needlesscomplexity.substack.com/p/rvint-integer-mathematical-library" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">needlesscomplexity.substack.co</span><span class="invisible">m/p/rvint-integer-mathematical-library</span></a><br>I did a lot of assembly language programming back when dinosaurs still roamed the earth, and there are still some valid use cases even today. I firmly believe that having a grasp of assembly language also helps one write better HLL code.<br><a href="https://mastodon.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> <a href="https://mastodon.social/tags/assembly" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>assembly</span></a></p>
Tindie Maker Marketplace<p>Play with the ESP32-C5 - finally! <a href="https://hackaday.social/tags/TindieBlog" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>TindieBlog</span></a> <a href="https://hackaday.social/tags/ESP32" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ESP32</span></a> <a href="https://hackaday.social/tags/DualBandWifi" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>DualBandWifi</span></a> <a href="https://hackaday.social/tags/Wifi6" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Wifi6</span></a> 802.15.4 <a href="https://hackaday.social/tags/Thread" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Thread</span></a> <a href="https://hackaday.social/tags/Zigbee" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Zigbee</span></a> <a href="https://hackaday.social/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> <br><a href="https://blog.tindie.com/2025/08/play-with-the-esp32-c5-finally/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">blog.tindie.com/2025/08/play-w</span><span class="invisible">ith-the-esp32-c5-finally/</span></a></p>
Dusty Mabe :fedora: :redhat:<p>For anyone out there with RISCV hardware I updated the RISCV CoreOS images at <a href="https://fedoraproject.org/wiki/Architectures/RISC-V/CoreOS" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">fedoraproject.org/wiki/Archite</span><span class="invisible">ctures/RISC-V/CoreOS</span></a> with the latest Fedora RPM packages available.</p><p><a href="https://fosstodon.org/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> <a href="https://fosstodon.org/tags/CoreOS" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>CoreOS</span></a></p>
jbz<p>🐧Linus Torvalds Rejects RISC-V Changes For Linux 6.17: "Garbage" • Phoronix</p><p>｢ Linus Torvalds has used his authority to reject the RISC-V architecture changes for the Linux 6.17 kernel. The RISC-V updates won't land this cycle and will need to try again for v6.18 later in the year ｣</p><p><a href="https://www.phoronix.com/news/Linux-6.17-RISC-V-Rejected" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">phoronix.com/news/Linux-6.17-R</span><span class="invisible">ISC-V-Rejected</span></a></p><p><a href="https://indieweb.social/tags/linux" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>linux</span></a> <a href="https://indieweb.social/tags/kernel" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>kernel</span></a> <a href="https://indieweb.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> <a href="https://indieweb.social/tags/opensource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>opensource</span></a></p>
openSUSE Linux<p>Closed-source <a href="https://fosstodon.org/tags/secure" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>secure</span></a> chips? That’s a security risk. In this powerful <a href="https://fosstodon.org/tags/oSC25" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>oSC25</span></a> keynote, discover the dangers of proprietary <a href="https://fosstodon.org/tags/hardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>hardware</span></a> and how open architectures like <a href="https://fosstodon.org/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> can save us. <a href="https://fosstodon.org/tags/openSUSE" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>openSUSE</span></a> <a href="https://fosstodon.org/tags/tropicsquare" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>tropicsquare</span></a> <a href="https://youtu.be/LK1NwIMHc1g?si=ej8rUmQPjARXVrIl" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">youtu.be/LK1NwIMHc1g?si=ej8rUm</span><span class="invisible">QPjARXVrIl</span></a></p>
Marcel SIneM(S)US<p><a href="https://social.tchncs.de/tags/Linux" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Linux</span></a> :tux: -tauglich: <a href="https://social.tchncs.de/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V-Einplatinencomputer für unter 40 Euro | c't Magazin <a href="https://www.heise.de/news/RISC-V-Einplatinencomputer-fuer-unter-40-Euro-10514884.html" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">heise.de/news/RISC-V-Einplatin</span><span class="invisible">encomputer-fuer-unter-40-Euro-10514884.html</span></a> <a href="https://social.tchncs.de/tags/OpenSource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OpenSource</span></a> <a href="https://social.tchncs.de/tags/RISCv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCv</span></a></p>
alios<p>Ich mag <a href="https://23.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> architektonisch sehr und ich mag <span class="h-card" translate="no"><a href="https://social.kernel.org/users/torvalds" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>torvalds</span></a></span> Code Reviews ... Wenn beides in nem PR zusammen kommt: <3 </p><p>Linus Torvalds Rejects RISC-V Changes For Linux 6.17: "Garbage"</p><p><a href="https://www.phoronix.com/news/Linux-6.17-RISC-V-Rejected" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">phoronix.com/news/Linux-6.17-R</span><span class="invisible">ISC-V-Rejected</span></a></p>
Hippo 🍉<p>Another hardware-focused project is <a href="https://fosstodon.org/tags/RIVET" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RIVET</span></a>, making a plug-and-play way for <a href="https://fosstodon.org/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> systems to connect to <a href="https://fosstodon.org/tags/ethernet" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ethernet</span></a> 🔌</p><p><a href="https://nlnet.nl/project/RIVET/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="">nlnet.nl/project/RIVET/</span><span class="invisible"></span></a></p><p>These are the small things that go a long way in speeding up <a href="https://fosstodon.org/tags/OpenHardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OpenHardware</span></a> development.</p><p>(I don't know if you gathered, but I like using open, customisable, and repairable devices that I can specially tailor to my needs—and I'm excited to see this take more shape in future!)</p><p>🧵 9/n</p>
Andrew Jones (hpcnotes)<p>A question for chip gurus to explain (ie argue 😁) …</p><p>Purely in architectural terms (ie ignore current success / adoption etc) - which is/was the best architecture: <a href="https://mast.hpc.social/tags/x86" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>x86</span></a> vs <a href="https://mast.hpc.social/tags/ARM" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ARM</span></a> vs <a href="https://mast.hpc.social/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> vs <a href="https://mast.hpc.social/tags/MIPS" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>MIPS</span></a> vs <a href="https://mast.hpc.social/tags/SPARC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>SPARC</span></a> vs <a href="https://mast.hpc.social/tags/IA64" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>IA64</span></a> vs Alpha - and why? What pros/cons of each make the choice?</p>
Christof Windeck<p>Eine abgespeckte Version des StarFive Vision Five 2 mit RISC-V-Vierkerner ist ab 20 US-Dollar netto zu haben. Bei der Software hakelt es weiter. <a href="https://social.heise.de/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a></p><p><a href="https://www.heise.de/news/RISC-V-Einplatinencomputer-fuer-unter-40-Euro-10514884.html" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">heise.de/news/RISC-V-Einplatin</span><span class="invisible">encomputer-fuer-unter-40-Euro-10514884.html</span></a></p>
adingbatponder<p><span class="h-card" translate="no"><a href="https://liliputing.com/author/liliputing_/" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>liliputing_</span></a></span> <a href="https://fosstodon.org/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> small <a href="https://fosstodon.org/tags/SBC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>SBC</span></a> single board computer <a href="https://fosstodon.org/tags/VisionFive2" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>VisionFive2</span></a> <a href="https://fosstodon.org/tags/visionfive2lite" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>visionfive2lite</span></a></p><p><a href="https://www.kickstarter.com/projects/starfive/visionfive-2-lite-unlock-risc-v-sbc-at-199" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">kickstarter.com/projects/starf</span><span class="invisible">ive/visionfive-2-lite-unlock-risc-v-sbc-at-199</span></a></p>
WinFuture.de<p>Raja Koduri, ehemaliger Ingenieur bei Intel und AMD, will mit seinem Startup Oxmiq die Kosten für GPU-Entwicklung um bis zu 90% senken. Basis ist die modulare <a href="https://mastodon.social/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a>-Architektur für flexible Chip-Designs. <a href="https://winfuture.de/news,152773.html?utm_source=Mastodon&utm_medium=ManualStatus&utm_campaign=SocialMedia" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">winfuture.de/news,152773.html?</span><span class="invisible">utm_source=Mastodon&utm_medium=ManualStatus&utm_campaign=SocialMedia</span></a></p>
Frederic Jacobs<p>Catching up on some of the really great talks from the Zurich DVClub on RISC-V Verification <br><a href="https://alpinumconsulting.com/dv-club-zurich-riscv-verification/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">alpinumconsulting.com/dv-club-</span><span class="invisible">zurich-riscv-verification/</span></a><br><a href="https://mastodon.social/tags/DV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>DV</span></a> <a href="https://mastodon.social/tags/SiliconEngineering" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>SiliconEngineering</span></a> <a href="https://mastodon.social/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> <a href="https://mastodon.social/tags/FormalMethods" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>FormalMethods</span></a> <a href="https://mastodon.social/tags/FV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>FV</span></a></p>
Flux<p>I love to hear about interesting accounts to follow for <a href="https://mastodon.social/tags/FPGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>FPGA</span></a>, <a href="https://mastodon.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a>, <a href="https://mastodon.social/tags/oshw" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>oshw</span></a>, and <a href="https://mastodon.social/tags/permacomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>permacomputing</span></a>. 💛</p>
advelin<p><a href="https://mastodon.social/tags/100%D0%B4%D0%BE%D0%BF%D0%B8%D1%81%D1%96%D0%B2%D1%83%D0%BA%D1%80%D0%B0%D1%97%D0%BD%D1%81%D1%8C%D0%BA%D0%BE%D1%8E" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>100дописівукраїнською</span></a> </p><p>Картинки не мої і взяті тут:</p><p><a href="https://www.moonbench.xyz/projects/1-bit-oled-art-gallery/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">moonbench.xyz/projects/1-bit-o</span><span class="invisible">led-art-gallery/</span></a></p><p>Потрібно ще попрацювати з сувом пікселів, але мені результат уже подобається :blobcatcoffee:</p><p><a href="https://mastodon.social/tags/ch32v003" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ch32v003</span></a> <a href="https://mastodon.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> <a href="https://mastodon.social/tags/spi" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>spi</span></a> <a href="https://mastodon.social/tags/ssd1306" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ssd1306</span></a> </p><p><span class="h-card" translate="no"><a href="https://soc.ua-fediland.de/@ua" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>ua</span></a></span> <span class="h-card" translate="no"><a href="https://social.net.ua/users/rada" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>rada</span></a></span></p>
hoergen<p>Statt Intel nun die 30Mrd Subventionen zu geben, kann man nun in die eigene Chip Entwicklung von RiscV investieren. Ganz nach dem EU Chip Act!</p><p><a href="https://horche.demkontinuum.de/search?tag=RiscV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RiscV</span></a> <a href="https://horche.demkontinuum.de/search?tag=Intel" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Intel</span></a> <a href="https://horche.demkontinuum.de/search?tag=Europa" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Europa</span></a> <a href="https://horche.demkontinuum.de/search?tag=Deutschland" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Deutschland</span></a></p>
Paolo Amoroso<p>A history of MIPS, the processor architecture and the chip making company.</p><p><a href="https://thechipletter.substack.com/p/mips" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">thechipletter.substack.com/p/m</span><span class="invisible">ips</span></a></p><p><a href="https://oldbytes.space/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>retrocomputing</span></a> <a href="https://oldbytes.space/tags/mips" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>mips</span></a> <a href="https://oldbytes.space/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a></p>
It's FOSS<p>CUDA comes to RISC-V!</p><p><a href="https://news.itsfoss.com/nvidia-cuda-risc-v/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">news.itsfoss.com/nvidia-cuda-r</span><span class="invisible">isc-v/</span></a></p><p><a href="https://mastodon.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> <a href="https://mastodon.social/tags/nvidia" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>nvidia</span></a> <a href="https://mastodon.social/tags/cuda" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>cuda</span></a></p>
TrendingLive feeds
Mastodon is the best way to keep up with what's happening.
Follow anyone across the fediverse and see it all in chronological order. No algorithms, ads, or clickbait in sight.
Create accountLoginDrag & drop to upload