I managed to run Debian GNU/Linux on VisionFive2, using the following instruction:
https://rvspace.org/en/project/VisionFive2_Debian_User_Guide
It runs from a 64GiB MicroSD card, the board boot mode is SDIO.
Next I'm going to try to run GNU Guix from a MicroSD card as well. I've already tried to run Guix on VisionFive2 using an eMMC but this try was only partially successful:
https://fosstodon.org/@avp/114589645768050312
For my fellow ASM nerds: a full deep dive on the #tenstorrent #ISA and its implementation on WH is now live on our GH! https://github.com/tenstorrent/tt-isa-documentation/tree/main/WormholeB0/TensixTile
Para practicar con la Rasbpberry pi pico2 en ensamblador del #Riscv he hecho un mini-kernel que permite multiplexar dos tareas
Es muy emocionante ver las dos tareas ejecutándose concurrentemente
El código está en este repositorio de github:
https://github.com/Obijuan/JANEL-OS
So, I’m not a programmer, I can usually hack things to make them work.
But, I’m stuck so I’m asking for advise please.
I’m using windows (not for much longer) and I’ve got a neorisc-v onto my Alchitry au board (it gets to the bootloader) but I can’t seem to compile any of the examples. I found a prebuilt windows compiler (.zip) but I’m lost what to do next. Can anyone help?
#riscv #fpga
A couple of days ago a new release 6.14 of KDE Frameworks came out and part of it is the syntax highlighting engine, used not only by KDE applications like Kate and KDevelop; but also by some others like Qt Creator.
I'm happy to report that this version also brings support for RISC-V instructions/registers/… in GNU Assembler, that I contributed:
https://invent.kde.org/frameworks/syntax-highlighting/-/merge_requests/694
#RISCV #RISC_V #assembler #assembly #programming #Kate #editor #KDevelop #QtCreator #Qt6 #IDE #KDE #KDEFrameworks @kde
@andypiper If you find any more #riscv hardware that I absolutely don't need then please let me know ;-)
More projects run on Open Source Hardware ESP32-P4-DevKit EUR 16 board with Espressif Dual Core RISC-V SOC https://www.youtube.com/shorts/PqLHHtLoO7w #esp32 #iot #espressif #riscv
Did you know that the bios on your x86 or Arm is proprietary. That's why Risc V is changing the world. https://fossforce.com/2025/05/rocky-linux-10-will-run-on-risc-v/
#foss #floss #opensource #riscv
It’s official: RISC-V will be joining the Rocky Linux 10 architecture lineup!
This milestone wouldn’t be possible without the incredible work of the Fedora RISC-V community. We’ve built on their upstream-first foundation to bring riscv64gc into the Rocky family—alongside x86_64, aarch64, ppc64le, and s390x.
Big thanks to @fedora, @RISC-V International, and everyone helping push open hardware forward.
Read more: https://rockylinux.org/news/rockylinux-support-for-riscv
#RockyLinux #RISCV #Fedora #AltArch
Alibaba Group Holding launched the server-grade XuanTie C930 processor, designed for high-performance computing applications, including data-centers and autonomous vehicles. The chip will begin shipping to clients this month.
The open-source RISC-V instruction set architecture used in the C930 chip is expected to broaden domestic use of open-source chips in China, countering US tech restrictions.
https://tech.yahoo.com/science/articles/alibabas-risc-v-chip-hits-093000410.html
Red Hat Enterprise Linux (#RHEL) 10 aka #RHEL10 is now officially out:
https://www.redhat.com/en/about/press-releases/red-hat-introduces-rhel-10
https://www.redhat.com/en/blog/whats-new-rhel-10
Release notes: https://docs.redhat.com/en/documentation/red_hat_enterprise_linux/10/html/10.0_release_notes/index
More docs: https://docs.redhat.com/en/documentation/red_hat_enterprise_linux/10/
Related news:
* Post-quantum cryptography in RHEL10 https://www.redhat.com/en/blog/post-quantum-cryptography-red-hat-enterprise-linux-10
* #RedHat partners with #SiFive for a #RISCV developer preview of RHEL10: https://www.redhat.com/en/blog/red-hat-partners-with-sifive-for-risc-v-developer-preview-for-red-hat-enterprise-linux-10
Last week, our consortium members from #BarcelonaSuperComputing Centre, Anna Escoda and Maritza Luis Perez, had the opportunity to present the @europeanOSacademy to the virant #openhardware #community at #RISCV Summit in Paris!
If you are interested in learning where our consortium or Academy members are headed next, explore our #events page : https://europeanopensource.academy/events
I've been seeing a lot of people saying they would love proxmox on raspberry pi obviously unaware that that's a reality for years by now.
If you are one of 'em have a look at
https://github.com/jiangcuo/pxvirt/wiki
pxvirt is the new name of the pimox project
It supports running proxmox on ARM64, RISC-V & LoongArch.
I personally only tested it on Raspbery Pi 4 & 5 as I still need a performant RISC-V system and a LoongArch machine.
Have a couple more openings on my team for folks if you want to come play:
First up is a Rust developer, mostly working on things like Luwen and working on moving some of our python based tools down to rust based tools. Lots of things coming, and all down in the systems stack.
https://job-boards.greenhouse.io/tenstorrent/jobs/4736078007
Second up is someone to come work on the OSPO side of things, day to day chasing stuff down on that front, getting out ahead, policy stuff, and some side scripting to help make things in a few directions better.
https://job-boards.greenhouse.io/tenstorrent/jobs/4736080007
Solid team, lots of interesting problems, and we are working in the open on open source tooling for things here.
Worth taking a look!
so is risc-v actually usable for daily driving and gaming or is it just a fancy cpu that is more of a research tool
Good luck to the #CHERI folks at the #RISCV summit this week trying to convince the architecture review board not to mandate a specific capability format in the Y base architecture!
It would be a real shame to standardise a base architecture that is incompatible with accelerators, microcontrollers, or future versions of a Linux-capable system with a richer set of permissions. The Y base should be like the I base: not a stand-alone set of everything you need to build a usable system, but the common subset that every system needs. I hope you can persuade the RISC-V folks that new base architectures should respect the same principles as existing ones.
M5Stack Tab5 is a dev kit with a 5 inch touchscreen display, a 2MP camera, and an ESP32-P4 dual-core, 32-bit 400 MHz RISC-V processor, a 40 MHz RISC-V MCU, and a bunch of wired & wireless I/O. Available now for $60. https://www.cnx-software.com/2025/05/09/m5stack-tab5-tablet-esp32-p4-iot-development-kit-5-inch-touchscreen-display-and-front-facing-camera/ #ESP32-P4 #RiscV #DevKit #M5StackTab5 #M5Stack
Ubuntu is serious about RISC-V, as news that its bringing Ubuntu 24.04 desktop to the Qualcomm Dragonwing Vision Kit shows
https://www.omgubuntu.co.uk/2025/05/ubuntu-24-04-desktop-qualcomm-dragonwing-release
felix86 is a new open source Linux emulator to run x86-64 Linux programs on RISC-V processors https://www.gamingonlinux.com/2025/05/felix86-is-a-new-open-source-linux-emulator-to-run-x86-64-linux-programs-on-risc-v-processors/
@jbz >It was Intel grant money, Patterson happily admits, that paid for the Berkeley architects to invent RISC-V in the first place. Without closed source, proprietary Big Tech, there’s no open source, free-for-all Little Tech. Don’t listen to the techno-hippies who claim otherwise; that’s always been the case.
Perhaps. But it doesn't *have* to be that way :) There are alternatives to finance capital. And even it traces much of its sustenance to generous state backing, something China seems to have learned and that the USA seems to have forgotten (if the anemic CHIPS act in the US is anything to go by).
