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#pico2

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The second of my articles documenting creating a replacement Amstrad CPC gate array using a Raspberry Pi RP2350 microcontroller. This time I use a PIO, a DMA and an array of data to drive the six signals with fixed timings.

Lots of nerdy detail for anyone wants to learn what a Pico is capable of, or for those who want a better understanding of the DMAs.

bread80.com/2024/08/25/pico-ga

bread80.comPico Garry 2350 Part 2: FSIGS (Fixed signals) – Bread80.com

One thing I'm wondering about: The #rp2040 was rated for 133MHz, but in practice got up to 430MHz while still running stably and being able to drive the PIO, PWM, DMA, and CPU at that speed.

Will the #rp2350 in the #pico2 be able to do the same or even higher speeds, or will the CPU give up earlier since it's more complex? The PLL looks like it is mostly the same as in the RP2040 at least.

Anyone that already has an RP2350, can you test what clock speeds you can reach?

Oh this is a very nice feature of the RP2350's (Q)SPI memory interface:

"The QMI can map addresses with its built-in address translation hardware: each chip select is partitioned into 4 × 4 MB windows, whose physical base address and aperture size are configured in units of 4 kB (one flash sector). This enables the runtime addresses of flash programs to be independent of where they are stored."

Massively simplifies a lot of things, including A/B firmware images.

Lots of fun new goodies in the RP2350.

New QMI memory controller supports two SPI/QSPI memory devices, and RAM as well as ROM/flash.

OTP area allows for USB VID/PID/string customization from bootloader onward, and user-provided second stage bootloader if desired.

Various PIO improvements and a 3rd PIO unit.

All USB errata from RP2040 fixed.

A new high-speed serial output block (HSTX) that can drive 8 outputs at 150MHz (optionally DDR). Interesting!